Abstract: This paper presents a 0.1-19.7GHz ultra-wideband two-stage power amplifier(PA) in 28nm CMOS process. Driven by the pole-zero analysis of the proposed T-coil input matching network, the PA ...
Abstract: The increasing requirements of bandwidth and inputs/outputs (IOs) density for high performance computing (HPC) and artificial intelligence (AI) applications are driving the need for the ...
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